december 2013 FDB20N50F ? n-channel unifet tm frfet ? mosfet ?2012 fairchild semiconductor corporation FDB20N50F rev. c3 www.fairchildsemi.com 1 FDB20N50F n-channel unifet tm frfet ? mosfet 500 v, 20 a, 260 m features ?r ds(on) = 220 m (typ.) @ v gs = 10 v, i d = 10 a ? low gate charge (typ. 50 nc) ?low c rss (typ. 27 pf) ? 100% avalanche tested ? improve dv/dt capability ?rohs compliant ? qualified according to jedec standards jesd22-a113f and ipc/jedec j-std-020d.1 applications ? lcd/led/pdp tv ? lighting ? uninterruptible power supply ? ac-dc power supply description unifet tm mosfet is fairchild semiconductor?s high voltage mosfet family based on planar stripe and dmos technology. this mosfet is tailored to reduce on-state resistance, and to provide better switching performance and higher avalanche energy strength. the body diode?s reverse recovery perfor- mance of unifet frfet ? mosfet has been enhanced by lifetime control. its t rr is less than 100nsec and the reverse dv/dt immunity is 15v/ns while no rmal planar mosfets have over 200nsec and 4.5v/nsec respectively. therefore, it can remove additional component and improve sy stem reliability in certain applications in which the performance of mosfet?s body diode is significant. this device fami ly is suitable for switching power converter applications such as power factor correction (pfc), flat panel display (fpd) tv power, atx and electronic lamp bal- lasts. g s d d 2 -pak g s d mosfet maximum ratings t c = 25 o c unless otherwise noted. thermal characteristics symbol parameter FDB20N50F unit v dss drain to source voltage 500 v v gss gate to source voltage 30 v i d d r a i n c u r r e n t - continuous (t c = 25 o c) 20 a - continuous (t c = 100 o c) 12.9 i dm d r a i n c u r r e n t - p u l s e d (note 1) 80 a e as single pulsed avalanche energy (note 2) 1110 mj i ar avalanche current (note 1) 20 a e ar repetitive avalanche energy (note 1) 25 mj dv/dt peak diode recovery dv/dt (note 3) 10 v/ns p d power dissipation (t c = 25 o c) 250 w - derate above 25 o c2.0w/ o c t j , t stg operating and storage temperature range -55 to +150 o c t l maximum lead temperature for soldering, 1/8? from case for 5 seconds 300 o c symbol parameter FDB20N50F unit r jc thermal resistance, junction to case, max. 0.5 o c/w r cs thermal resistance, case to sink, typ. 0.5 r ja thermal resistance, junction to ambient, max. 62.5
FDB20N50F ? n-channel unifet tm frfet ? mosfet ?2012 fairchild semiconductor corporation FDB20N50F rev. c3 www.fairchildsemi.com 2 package marking and ordering information electrical characteristics t c = 25 o c unless otherwise noted. off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics part number top mark package packing method reel size tape width quantity FDB20N50F FDB20N50F d 2 -pak tape and reel 330 mm 24 mm 800 units symbol parameter test conditions min. typ. max. unit bv dss drain to source breakdown voltage i d = 500 ua, v gs = 0 v, t j = 25 o c 500 - - v bv dss / t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 o c-0.7-v/ o c i dss zero gate voltage drain current v ds = 500 v, v gs = 0 v - - 200 a v ds = 400 v, t c = 125 o c - - 500 i gss gate to body leakage current v gs = 30 v, v ds = 0 v - - 100 na v gs(th) gate threshold voltage v gs = v ds , i d = 250 a3.0-5.0v r ds(on) static drain to source on resistance v gs = 10 v, i d = 10 a - 0.22 0.26 g fs forward transconductance v ds = 20 v, i d = 10 a - 25 - s c iss input capacitance v ds = 25 v, v gs = 0 v, f = 1 mhz - 2550 3390 pf c oss output capacitance - 350 465 pf c rss reverse transfer capacitance - 27 40 pf q g(tot) total gate charge at 10v v ds = 400 v, i d = 20 a, v gs = 10 v (note 4) -5065nc q gs gate to source gate charge - 14 - nc q gd gate to drain ?miller? charge - 20 - nc t d(on) turn-on delay time v dd = 250 v, i d = 20 a, v gs = 10 v, r g = 25 (note 4) - 45 100 ns t r turn-on rise time - 120 250 ns t d(off) turn-off delay time - 100 210 ns t f turn-off fall time - 60 130 ns i s maximum continuous drain to source diode forward current - - 20 a i sm maximum pulsed drain to source diode forward current - - 80 a v sd drain to source diode forward voltage v gs = 0 v, i sd = 20 a - - 1.5 v t rr reverse recovery time v gs = 0 v, i sd = 20 a, di f /dt = 100 a/ s - 154 - ns q rr reverse recovery charge - 0.5 - c notes: 1. repetitive rating: pulse-width li mited by maximum junction temperature. 2. l = 5 mh, i as = 20 a, v dd = 50 v, r g = 25 , starting t j = 25 c. 3. i sd 20 a, di/dt 200 a/ s, v dd bv dss , starting t j = 25 c. 4. essentially independent of operating temperature typical characteristics.
FDB20N50F ? n-channel unifet tm frfet ? mosfet ?2012 fairchild semiconductor corporation FDB20N50F rev. c3 www.fairchildsemi.com 3 typical performance characteristics figure 1. on-region characteristics figure 2. transfer characteristics figure 3. on-resistance variation vs. figure 4. body diode forward voltage drain current and gate vo ltage variation vs. source current and temperature figure 5. capacitance characteristics figure 6. gate charge characteristics 0.1 1 10 1 10 20 0.3 *notes: 1. 250 s pulse test 2. t c = 25 o c v gs = 15.0 v 10.0 v 8.0 v 7.0 v 6.5 v 6.0 v 5.5 v i d ,drain current[a] v ds ,drain-source voltage[v] 80 45678 1 10 100 150 o c *notes: 1. v ds = 20v 2. 250 s pulse test 25 o c i d ,drain current[a] v gs ,gate-source voltage[v] 0.0 0.5 1.0 1.5 2.0 2.5 1 10 100 *notes: 1. v gs = 0v 2. 250 s pulse test 150 o c i s , reverse drain current [a] v sd , body diode forward voltage [v] 25 o c 400 0255075 0.1 0.2 0.3 0.4 0.5 *note: t j = 25 o c v gs = 20v v gs = 10v r ds(on) [ ] , drain-source on-resistance i d , drain current [a] 0.1 1 10 0 1500 3000 4500 6000 c oss c iss c iss = c gs + c gd ( c ds = shorted ) c oss = c ds + c gd c rss = c gd *note: 1. v gs = 0v 2. f = 1mhz c rss capacitances [pf] v ds , drain-source voltage [v] 50 0 102030405060 0 2 4 6 8 10 *note: i d = 20a v ds = 100v v ds = 250v v ds = 400v v gs , gate-source voltage [v] q g , total gate charge [nc]
FDB20N50F ? n-channel unifet tm frfet ? mosfet ?2012 fairchild semiconductor corporation FDB20N50F rev. c3 www.fairchildsemi.com 4 typical performance characteristics (continued) figure 7. breakdown voltage variation figure 8. maximum safe operating area vs. temperature figure 9. maximum drain current figure 10. unclemped inductive vs. case temperature switching capability figure 11. transient thermal response curve -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 *notes: 1. v gs = 0v 2. i d = 1ma bv dss , [normalized] drain-source breakdown voltage t j , junction temperature [ o c ] *notes: 1. t c = 25 o c 2. t j = 150 o c 3. single pulse i d , drain current [a] v ds , drain-source voltage [v] 100 ms 1 ms 10 s dc 10 ms 100 s operation in this area is limited by r ds(on) 25 50 75 100 125 150 0 5 10 15 20 25 i d , drain current [a] t c , case temperature [ o c ] t j = 25 o c t av , time in avalanche (ms) i as , avalanche current (a) 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 0.01 0.1 1 0.002 t 1 p d m t 2 thermal response [ z jc ] rectangular pulse duration [sec] *notes: 1. z jc (t) = 0.5 o c/w max. 2. duty factor, d= t 1 /t 2 3. t jm - t c = p dm * z jc (t) single pulse 0.5 0.02 0.2 0.05 0.1 0.01 t 1 p dm t 2 z jc (t), thermal response [ o c/w] t 1 , rectangular pulse duration [sec]
FDB20N50F ? n-channel unifet tm frfet ? mosfet ?2012 fairchild semiconductor corporation FDB20N50F rev. c3 www.fairchildsemi.com 5 figure 12. gate charge test circuit & waveform figure 13. resistive switch ing test circuit & waveforms figure 14. unclamped inductive switching test circuit & waveforms v gs v ds 10% 90% t d(on) t r t on t off t d(off) t f v dd 10v v ds r l dut r g v gs v gs v ds 10% 90% t d(on) t r t on t off t d(off) t f v dd 10v v ds r l dut r g v gs v gs v gs i g = const.
FDB20N50F ? n-channel unifet tm frfet ? mosfet ?2012 fairchild semiconductor corporation FDB20N50F rev. c3 www.fairchildsemi.com 6 figure 15. peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period --------------------------
FDB20N50F ? n-channel unifet tm frfet ? mosfet ?2012 fairchild semiconductor corporation FDB20N50F rev. c3 www.fairchildsemi.com 7 mechanical dimensions figure 16. to263 (d 2 pak), molded, 2-lead, surface mount package drawings are provided as a servic e to customers considering fairchild co mponents. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packag ing area for the most recent package drawings: http://www.fairchildsemi.com/package/ packagedetails.html?id=pn_tt263-0r2
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